- AutorIn
- Martin Zabel
- Rainer G. Spallek
- Titel
- SHAP — Scalable Multi-Core Java Bytecode Processor
- Zitierfähige Url:
- https://nbn-resolving.org/urn:nbn:de:bsz:14-qucosa-97619
- Schriftenreihe
- Technische Berichte
- Bandnummer
- 2009,13 (TUD-FI09-13 Dezember 2009)
- Erstveröffentlichung
- 2009
- ISSN
- 1430-211X
- Abstract (EN)
- Abstract This paper introduces a new embedded Java multi-core architecture which shows a significantly better performance for a large number of cores than the related projects JopCMP and jamuth IP multi-core. The cores gain fast access to the shared heap by a fullduplex bus with pipelined transactions. Each core is equipped with local on-chip memory for the Java operand stack and the method cache to further reduce the memory bandwidth requirements. As opposed to the related projects, synchronization is supported on a per object-basis instead of a single lock. Load balancing is implemented in Java and requires no additional hardware. The multi-port memory manager includes an exact and fully concurrent garbage collector for automatic memory management. The design can be synthesized for a variable number of parallel cores and shows a linear increase in chip-space. Three different benchmarks demonstrate the very good scalability of our architecture. Due to limited chip-space on our evaluation platform, the core count could not be increased further than 8. But, we expect a smooth performance decrease.
- Freie Schlagwörter (DE)
- SHAP, Java, Programmierung
- Freie Schlagwörter (EN)
- Java Bytecode Processor
- Klassifikation (DDC)
- 004
- Klassifikation (RVK)
- SS 5514
- Publizierende Institution
- Technische Universität Dresden, Dresden
- URN Qucosa
- urn:nbn:de:bsz:14-qucosa-97619
- Veröffentlichungsdatum Qucosa
- 14.11.2012
- Dokumenttyp
- Forschungsbericht
- Sprache des Dokumentes
- Englisch
- Lizenz / Rechtehinweis